Electronics Resurgence Initiative: Page 3 Investments Architectures Thrust
DARPA - Microsystems Technology Office · Opportunity HR001117S0055
The full proposal must be submitted via the DARPA BAA website on or before 1:00 PM, Eastern Time, December 8, 2017. If deemed compliant, the Government will evaluate all such proposals in the initial round of selections.Additionally, proposals may be submitted after the above due date until 1:00 PM, Eastern Time, January 31, 2018 which, if deemed compliant, will be reviewed at the Government’s discretion, depending upon the availability of funding. Proposers are warned that the likelihood of available funding is greatly reduced for proposals submitted after the initial closing date deadline.
Who can apply
- Unrestricted
About this opportunity
Amendment 03: The purpose of this amendment is to revise the response date. See the attached conformed BAA with changes highlighted in yellow. Amendment 02: The purpose of this amendment is to correct a typographical error in the abstract details on page 41. See the attached conformed BAA with changes highlighted in yellow.Amendment 01: The purpose of this amendment is to make administrative changes as highlighted in yellow in the attached.Original Synopsis Below:DARPA is soliciting innovative research proposals in the area of novel computing architectures. The Page 3 Architectures thrust of the Electronics Resurgence Initiative (ERI) seeks to demonstrate heterogeneous computing systems that provide the performance advantages of specialized processors, while maintaining the programmability of general purpose processors.The goal of the Software Defined Hardware (SDH) program is to build runtime-reconfigurable hardware and software that enables near ASIC performance without sacrificing programmability for data-intensive algorithms. SDH will create a hardware/software system that allows data-intensive algorithms to run at near ASIC efficiency without the cost, development time or single application limitations associated with ASIC development. The overall goal of the Domain-specific System on Chip (DSSoC) program is to develop a heterogeneous SoC comprised of many cores that mix general-purpose processors, special-purpose processors, hardware accelerators, memory, and input/output (I/O). DSSoC seeks to enable rapid development of multi-application systems through a single programmable device.
Similar grants still open
| Opportunity | Agency | Deadline | Award ceiling | Eligible |
|---|---|---|---|---|
| Small Business Innovation Research / Small Business Technology Transfer Phase I, Phase II, Fast-Track Programs (SBIR/STTR): A Pilot Emphasis on Scientific Instrumentation. | U.S. National Science Foundation | July 27, 2026 0d left | — | |
| Integrated Data Systems & Services | U.S. National Science Foundation | July 28, 2026 1d left | $30M | |
| DoW Kidney Cancer, Concept Award | Defense Health Agency Contracting Activity - DHACA | July 28, 2026 1d left | — | Nonprofits Individuals |
| Disability and Rehabilitation Research Projects (DRRP) Program: Model Systems Knowledge Translation Center | Administration for Community Living | July 29, 2026 2d left | $850k | Nonprofits |